Abstract With the advent of portable/embedded systems that rely on battery power, power/energy management has become a focus point of numerous research projects in academia and industry. At the system level, existing techniques usually exploit various performance trade-offs to save power. A major operating system level energy management technique is Dynamic Voltage Scaling (DVS), recently incorporated to the processor lines of Intel and AMD. In essence, DVS consists in adjusting the CPU supply voltage and frequency (hence, the CPU speed) on the fly. While it is possible to obtain significant energy savings at the expense of increased response times with DVS, it is imperative that the timeliness guarantees be still provided for real-time applications. In the first part of our talk we will overview the fundamentals of DVS-based power management for periodic real-time applications. Then, we will present some main results on CPU energy minimization and show their inherent limitations when system-level energy management is considered. Finally, we will present highlights from our recent and on-going research that generalizes previous DVS-based frameworks by considering i.) frequency-dependent and frequency-independent power components, ii.) variations in task power dissipation rates, and, iii.) off-chip and on-chip access patterns. We will conclude by a brief look at the related open problems.