bc $t0, Loop
This instruction decrements the specified register
by 1.
The result is then compared to 0.
If the result is 0, then the program branches to
the address specified. In the example above,
$t0 is decremented by 1, and if the result
is equal to 0, the program jumps to the address
with the label Loop. (Note that decrementing $t0 by 1 means
that $t0 = $t0 - 1. In other words the contents of the register are
decremented irrespective of whether the branch is taken or not.)
Assume that bc operates pretty much
the same way that beq operates
for the MIPS CPU discussed in class, i.e., PC-relative
addressing is used to convert the
16-bit word address Loop to a 32 bit byte address.
Your first step should be to figure out what (if any) modifications
you need to
make to the data path. The next step would be to
figure out what changes you need to make to
the control signals. This means (a) figure out what existing
control signals (if any) will need to
be modified to support bc, and (b) what new control
signals (if any) will need to be added.
Assume that bc is of the I format, with the register to
be decremented
specified in the field rs, while the rt field is set to
0.
(1) Are there any changes are required to the ALU of Chapter 4
to support
this new instruction? If so, what are they and describe
how the ALU would be used by this instruction.
If not, discuss why not and describe how the ALU of Chapter 4 would
be used by this instruction.
(2) Write down the RTL (Register Transfer Language) for the bc instruction.
See the RTL for the different instructions in the class slides for an example
of the RTL notation.
Show your additions to the data path and control by modifying the
figure on page 5.29
Also, list clearly
each change that you have made and describe why the change was needed.
(3) Make the necessary changes or extensions to the table in Figure
5.20 of the textbook showing any
new control signals and the settings of all the control signals for
the new instruction.
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QUESTION 2)
Extend the multi-cycle implementation of the MIPS CPU (Figure 5.33 of
the textbook) for the bc
instruction discussed above.
Answer the following questions:
(1) Show your additions to the data path and control by modifying
the figure 5.33.
Also, list clearly
each change that you have made and describe why the change was needed.
(2) Make the necessary changes or extensions to the finite
state machine control shown in
Figure 5.42 of the textbook
for supporting the bc instruction.
NOTE: for both these problems, you can photocopy the figures
from the textbook or download
figures from http://www.mkp.com/cod2e.htm
to make it easier to show your modifications.